Cache allocation with code and data prioritization

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United States of America Patent

PATENT NO 9563564
SERIAL NO

14680287

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Abstract

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Systems and methods for cache allocation with code and data prioritization. An example system may comprise: a cache; a processing core, operatively coupled to the cache; and a cache control logic, responsive to receiving a cache fill request comprising an identifier of a request type and an identifier of a class of service, to identify a subset of the cache corresponding to a capacity bit mask associated with the request type and the class of service.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chamberlain, Jeffrey D Tracy, US 26 240
Gianos, Christopher C Sterling, US 9 172
Herdrich, Andrew J Hillsboro, US 88 1283
Iyer, Ravishankar Portland, US 124 1772
Mandelblat, Julius Haifa, IL 25 171
Singhal, Ronak Portland, US 43 438
Toll, Bret L Hillsboro, US 162 1358
Verplanke, Edwin Chandler, US 43 292

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