Testing fuse configurations in semiconductor devices

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United States of America Patent

PATENT NO 9568544
SERIAL NO

14250191

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A system includes a first integrated circuit configured to operate in at least a normal mode and a test mode and a second integrated circuit, where both the first integrated circuit and the second integrated circuit are disposed within a same semiconductor device package. The system further includes a first terminal, external to the semiconductor device package, electronically coupled to the first integrated circuit and the second integrated circuit. The first terminal is electronically coupled to a buffer in the second integrated circuit and used to convey signals to or from the first integrated circuit.

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Patent Owner(s)

  • RAMBUS INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fuller, Paul Ketchum, US 18 128
Heel, Nick van Eagle, US 5 28
Ong, Adrian E Pleasanton, US 124 2478
Thomann, Mark Boise, US 12 130

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