Using dynamic bursts to support frequency-agile memory interfaces
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United States of America Patent
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Feb 14, 2017
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app pub date -
Sep 6, 2013
filing date -
Sep 11, 2012
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Abstract
The disclosed embodiments relate to a system that supports dynamic bursts to facilitate frequency-agile communication between a memory controller and a memory device. During operation, the system monitors a reference clock signal received at an interface between the memory device and the memory controller. Upon detecting a frequency change in the reference clock signal from a fullrate to a subrate, the interface operates in a burst mode, wherein data is communicated through bursts separated by intervening low-power intervals during which portions of the interface are powered down.
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