Memory system

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United States of America Patent

PATENT NO 9569111
APP PUB NO 20160239214A1
SERIAL NO

15135953

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Abstract

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According to the embodiments, a memory system includes a nonvolatile semiconductor memory and a writing-loop-count monitoring unit that monitors a loop count of an applied voltage to the nonvolatile semiconductor memory required for data writing of the nonvolatile semiconductor memory as a writing loop count. Moreover, the memory system includes a management table for managing the writing loop count in block unit that is a unit of data erasing and a life managing unit that determines a degraded state of the nonvolatile semiconductor memory based on the management table.

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Patent Owner(s)

  • TOSHIBA MEMORY CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Okamoto, Shinken Shizuoka, JP 8 61

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