Method of planarizing polysilicon gate

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United States of America Patent

PATENT NO 9570562
SERIAL NO

15235172

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Abstract

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A method of planarizing a polysilicon gate are provided, comprising: growing a polysilicon gate layer on a substrate with trenches; depositing an oxide layer on the polysilicon gate layer; oxidizing the top portion of the polysilicon gate layer from the flat surface of the oxide layer, so as to form a silicon oxide interlayer in the top portion of the polysilicon gate layer; the bottom of the silicon oxide interlayer is aligned with or lower than the low-lying areas of surface of the polysilicon gate layer; removing the oxide layer and the silicon oxide interlayer, so as to obtain a flat surface of the polysilicon gate layer and avoid a series of problems resulted from the uneven surface in the subsequent processes.

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Patent Owner(s)

Patent OwnerAddress
SHANGHAI HUALI MICROELECTRONICS CORPORATIONNO 6 LIANGTENG ROAD PUDONG NEW AREA SHANGHAI 201314

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lei, Tong Shanghai, CN 4 6
Yan, Junhua Shanghai, CN 4 210

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