Integrated circuits with self aligned contacts and methods of manufacturing the same

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United States of America Patent

PATENT NO 9576852
APP PUB NO 20160379881A1
SERIAL NO

14751380

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Abstract

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Integrated circuits and methods for producing the same are provided. A method for producing an integrated circuit includes forming an interconnect in a first interlayer dielectric. A first cap is formed overlying the first interlayer dielectric adjacent to the interconnect, and a second interlayer dielectric is formed overlying the first interlayer dielectric, the interconnect, and the cap. A contact is formed through the second interlayer dielectric, where the contact includes an overlap region and a connection region. The overlap region directly overlies the first interlayer dielectric adjacent to the interconnect, and the connection region directly contacts the interconnect. The first cap is positioned between the overlap region and the first interlayer dielectric.

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Patent Owner(s)

  • GLOBALFOUNDRIES INC.;INTERNATIONAL BUSINESS MACHINES CORPORATION;STMICROELECTRONICS, INC.

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
He, Ming Menands, US 98 873
Kelly, Jim Schenectady, US 13 152
Mignot, Yann Slingerlands, US 119 279
Nam, Seowoo Delmar, US 11 82
Patlotta, Raghuveer Guilderland, US 1 7
Standaert, Theodorus Clifton Park, US 13 48

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