Method to form a 3D semiconductor device

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United States of America Patent

PATENT NO 9577642
APP PUB NO 20120193806A1
SERIAL NO

12941074

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Abstract

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A method to form a 3D integrated circuit, the method including: fabricating two or more devices; connecting the devices together to form the 3D integrated circuit, where at least one of the devices has at least one unused designated dice line and at least one of the devices is a configurable device; and interconnecting at least two of the devices using Through Silicon Vias.

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Patent Owner(s)

  • MONOLITHIC 3D INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Or-Bach, Zvi San Jose, US 534 17764
Wurman, Ze'ev Palo Alto, US 18 2314

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