Performance of processors is improved by limiting number of branch prediction levels
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United States of America Patent
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Feb 28, 2017
Grant Date -
Jun 6, 2013
app pub date -
Dec 1, 2011
filing date -
Dec 1, 2011
priority date (Note) -
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Abstract
A method utilizes information provided by performance monitoring hardware to dynamically adjust the number of levels of speculative branch predictions allowed (typically 3 or 4 per thread) for a processor core. The information includes cycles-per-instruction (CPI) for the processor core and number of memory accesses per unit time. If the CPI is below a CPI threshold; and the number of memory accesses (NMA) per unit time is above a prescribed threshold, the number of levels of speculative branch predictions is reduced per thread for the processor core. Likewise, the number of levels of speculative branch predictions could be increased, from a low level to maximum allowed, if the CPI threshold is exceeded or the number of memory accesses per unit time is below the prescribed threshold.
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