Store cache for transactional memory
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United States of America Patent
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Mar 7, 2017
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N/A
app pub date -
Nov 10, 2014
filing date -
Nov 10, 2014
priority date (Note) -
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status (Latency Note)
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Abstract
A method to merge one or more non-transactional stores and one or more thread-specific transactional stores into one or more cache line templates in a store buffer in a store cache. The method receives a thread-specific non-transactional store address and a first data, maps the store address to a first cache line template, and merges the first data into the first cache line template, according to a store policy. The method further receives a thread-specific transactional store address and a second data, maps the thread-specific store address into a second cache line template, according to a store policy. The method further writes back a copy of a cache line template to a cache and invalidates a third cache line template, which frees the third cache line template from a store address mapping.
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