Reducing programming disturbance in memory devices
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United States of America Patent
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Mar 7, 2017
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app pub date -
Oct 8, 2012
filing date -
Oct 8, 2012
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Abstract
Apparatus and methods are disclosed, such as a method that includes precharging channel material of a string of memory cells in an unselected sub-block of a block of memory cells to a precharge voltage during a first portion of a programming operation. A programming voltage can then be applied to a selected memory cell in a selected sub-block of the block of memory cells during a second portion of the programming operation. The selected memory cell is coupled to a same access line as an unselected memory cell in the unselected sub-block. Additional methods and apparatus are disclosed.
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