HIGH-K SPACER FOR EXTENSION-FREE CMOS DEVICES WITH HIGH MOBILITY CHANNEL MATERIALS
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United States of America Patent
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Mar 28, 2017
Grant Date -
Mar 30, 2017
app pub date -
Sep 29, 2015
filing date -
Sep 29, 2015
priority date (Note) -
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Abstract
A field effect transistor device includes a gate structure formed over a channel region in a semiconductor material. An inner spacer is formed on sidewalls of the gate structure and over an extension region of the semiconductor material. The inner spacer includes charge or dipoles. A source/drain region is formed adjacent to the gate structure. An inversion layer is formed in the extension region induced by the inner spacer to form a conductive link between the channel region and the source/drain region.
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