Heterojunction tunnel field effect transistor fabrication using limited lithography steps

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United States of America Patent

PATENT NO 9614042
SERIAL NO

14640280

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Abstract

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A structure and method for fabricating a vertical heterojunction tunnel field effect transistor (TFET) using limited lithography steps is disclosed. The fabrication of a second conductivity type source/drain region may utilize a single lithography step to form a first-type source/drain region, and a metal contact thereon, adjacent to a gate stack having a first conductivity type source/drain region on an opposite side.

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Leobandung, Effendi Stormville, US 536 4779

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