Optimized use of hardware micro partition prefetch based on software thread usage

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United States of America Patent

PATENT NO 9619393
SERIAL NO

14935490

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A system and/or computer program product selectively adjusts a resources addresses cache of addresses of resources used by virtual processors. A first dispatch from a hypervisor dispatches a first virtual processor, and then tracks processes executed by the first virtual processor. The hypervisor caches cache addresses of resources used by the processes after the first dispatch in a resources addresses cache. The hypervisor undispatches the first virtual processor, and then redispatches the first virtual processor as a second virtual processor by issuing a second dispatch. Processes executed by the second virtual processor are compared to processes executed during by the first virtual processor, thus leading to an identification of a level of process utilization consistency. The hypervisor then adjusts the resources addresses cache by selectively clearing resource addresses based on the level of process utilization consistency.

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
B, T Hemalatha Bangalore, IN 2 0
Heyrman, Peter J Rochester, US 37 305
Olszewski, Bret R Austin, US 71 720

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