Third party component debugging for integrated circuit design

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United States of America Patent

PATENT NO 9619600
SERIAL NO

14491834

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Abstract

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The application is directed towards facilitating the debugging of suspected errors in a proprietary component when the proprietary component is incorporated into a larger electronic design. Various implementations provide for the generation of a reference model for an integrated circuit design, where the reference model includes the proprietary component and sufficient information about the rest of the design to allow for the debugging of the proprietary component over a period of verification where the error in the proprietary component is suspected.

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Patent Owner(s)

  • MENTOR GRAPHICS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gupta, Sanjay Noida, IN 223 4911
Selvidge, Charles W Wellesley, US 36 648
Suresh, Krishnamurthy Noida, IN 16 99

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