Self aligned gate shape preventing void formation

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United States of America Patent

PATENT NO 9640633
SERIAL NO

14974589

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Abstract

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A semiconductor device that includes a first fin structure in a first portion of a substrate, and a second fin structure in a second portion of the substrate, wherein the first portion of the substrate is separated from the second portion of the substrate by at least one isolation region. A gate structure present extending from the first fin structure across the isolation region to the second fin structure. The gate structure including a first portion on the first fin structure including a first work function metal having at least one void, an isolation portion that is voidless present overlying the isolation region, and a second portion on the second fin structure including a second work function metal.

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Patent Owner(s)

  • GLOBALFOUNDRIES INC.;INTERNATIONAL BUSINESS MACHINES CORPORATION;STMICROELECTRONICS, INC.

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Greene, Andrew M Albany, US 118 475
Liu, Qing Irvine, US 483 5057
Xie, Ruilong Niskayuna, US 1423 10785
Yeh, Chun-Chen Clifton Park, US 417 3476

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