Clock generating device
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United States of America Patent
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May 9, 2017
Grant Date -
Jun 30, 2016
app pub date -
Dec 16, 2015
filing date -
Dec 31, 2014
priority date (Note) -
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status (Latency Note)
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Abstract
A clock generating device includes a first timing delay module, a multiplexer, and a second timing delay module. The multiplexer is electrically connected to the first timing delay module. The second timing delay module is electrically connected to the multiplexer. The first timing delay module generates a plurality of delayed clock signals based on a reference clock signal. The multiplexer outputs a first delayed clock signal and a second delayed clock signal, among the plurality of delayed clock signals, based on a clock generating signal. The second timing delay module generates an output clock signal based on the clock generating signal, the first delayed clock signal and the second delayed clock signal.
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