Systems and methods for exposing a result of a current processor instruction upon exiting a virtual machine

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United States of America Patent

PATENT NO 9672354
SERIAL NO

14489820

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Abstract

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Described systems and methods enable a host system to efficiently perform computer security activities, when operating in a hardware virtualization configuration. A processor is configured to generate a VM suspend event (e.g., a VM exit or a virtualization exception) when a guest instruction executing within a guest VM performs a memory access violation. In some embodiments, the processor is further configured to delay generating the VM suspend event until the execution stage of the pipeline for the guest instruction is complete, and to save results of the execution stage to a specific location (e.g. a specific processor register readable by security software) before generating the event.

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Patent Owner(s)

Patent OwnerAddress
BITDEFENDER IPR MANAGEMENT LTDCYPRUS NICOSIA NICOSIA NICOSIA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lukacs, Sandor Floresti, RO 57 1472
Lutas, Andrei V Satu Mare, RO 23 514

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