Fabrication of III-V-on-insulator platforms for semiconductor devices
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United States of America Patent
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Jul 4, 2017
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Jan 7, 2015
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Jan 7, 2015
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Abstract
Embodiments of the present invention provide III-V-on-insulator (IIIVOI) platforms for semiconductor devices and methods for fabricating the same. According to one embodiment, compositionally-graded buffer layers of III-V alloy are grown on a silicon substrate, and a smart cut technique is used to cut and transfer one or more layers of III-V alloy to a silicon wafer having an insulator layer such as an oxide. One or more transferred layers of III-V alloy can be etched away to expose a desired transferred layer of III-V alloy, upon which a semi-insulating buffer layer and channel layer can be grown to yield IIIVOI platform on which semiconductor devices (e.g., planar and/or 3-dimensional FETs) can be fabricated.
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