Reducing SRAM power using strategic data pattern storage
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United States of America Patent
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Jul 11, 2017
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app pub date -
Sep 2, 2016
filing date -
Sep 2, 2016
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Abstract
Embodiments herein describe a SRAM that selectively flips received chunks of data from a high power state to a low power state before storing the chunks of data. The SRAM generates a flip bit for each of the data chunks stored in memory. The state of the flip bit varies depending on whether the corresponding data chunk was flipped before being stored in the SRAM. In one embodiment, the SRAM flips the bits in a data chunk before storing the bits only if all the bits are in the high power state. If so, the SRAM sets the flip bit for the data chunk to a first state and changes all the bits to the low power state before storing the data chunk. If not, the SRAM sets the flip bit to a second state and stores the data chunk without changing the states of the bits.
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