Reducing power by vacating subsets of CPUs and memory

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United States of America Patent

PATENT NO 9715268
SERIAL NO

14707881

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Abstract

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A system has one or more primary power regions having restrictions indicating that the primary power regions are not to be placed in an offline state. The system also includes one or more secondary power region that can either be parked or off-lined into a limited state having limited functionality in that functionality is removed from the one or more secondary power regions when placed in a limited state. At least one interrupt is allocated to one of the primary power regions, based on interrupt characteristics. At least one thread is allocated to one of the primary power regions, based on thread characteristics. At least one page is allocated to one of the primary power regions, based on page characteristics.

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Patent Owner(s)

  • MICROSOFT TECHNOLOGY LICENSING, LLC

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sharda, Vishal Redmond, US 8 152
Worthington, Bruce Lee Redmond, US 14 111

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