Comparator circuits with constant input capacitance for a column-parallel single-slope ADC
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United States of America Patent
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Jul 25, 2017
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app pub date -
May 12, 2015
filing date -
May 12, 2015
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Abstract
Comparator circuits suitable for use in a column-parallel single-slope ADC comprise a comparator, an input voltage sampling switch connected between an input voltage Vin and a first node, and a sampling capacitor connected between the first and second nodes and which stores a voltage which varies with Vin when the sampling switch is closed. A first reset switch is connected between the second node and a reset voltage, an isolation buffer is coupled between the second node and a comparator input, and a voltage ramp switch applies a voltage ramp Vramp to the first node when closed. The comparator output toggles when Vramp exceeds Vin, with the isolation buffer maintaining a nearly constant capacitive load on Vramp. A ‘ramp disconnect’ feature can be used to increase the circuit's input range, and a dummy capacitor can be employed to maintain a constant capacitance on Vramp.
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