Importance

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Abstract

Technology described herein includes an arrangement whereby a hardware-based solution is implemented to enable mirroring of NVRAM data in a master server directly to NVRAM in a sleeper server. Both the master server and sleeper server implement a like motherboard unit, which is configured to implement the mirroring technology. That is, the roles of master and sleeper may be reversed. The master server includes a hardware module that monitors (but does not affect) NVRAM operations at the master server, and replicates those operations via a high speed communications link, such as a fiber optic link, to the sleeper server. The term “high speed communications link” refers to a link with at least 2.5 gigabit speed, and preferably at least 5 gigabit speed. The sleeper server is configured to, when in sleeper mode, suspend control of its own NVRAM module. Instead, the NVRAM module is controlled by a module that is configured to receive NVRAM operations via the fiber optic link, and apply those operations. In this manner, there is a direct mirroring of all master NVRAM content affected in the master's NVRAM to the sleeper's NVRAM. Using technology described herein, this is affected at an “atomic” (e.g. NVRAM bus cycle) level.

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First Claim