Shared buffered memory routing

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United States of America Patent

PATENT NO 9720838
SERIAL NO

14670578

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Abstract

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A shared memory controller receives a flit from another first shared memory controller over a shared memory link, where the flit includes a node identifier (ID) field and an address of a particular line of the shared memory. The node ID field identifies that the first shared memory controller corresponds to a source of the flit. Further, a second shared memory controller is determined from at least the address field of the flit, where the second shared memory controller is connected to a memory element corresponding to the particular line. The flit is forwarded to the second shared memory controller using a shared memory link according to a routing path.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Das, Sharma Debendra Saratoga, US 191 1591
Jen, Michelle C Mountain View, US 25 205
Morris, Brian S Santa Clara, US 33 483

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