Low leakage and data retention circuitry

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United States of America Patent

PATENT NO 9722605
SERIAL NO

15137424

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Abstract

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An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

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Patent Owner(s)

Patent OwnerAddress
MOSAID TECHNOLOGIES INCOTTAWA ON K2K 2X1

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Callahan, John M San Ramon, US 31 346
Cole, Andrew Sunnyvale, US 33 614
Hillman, Daniel L San Jose, US 28 767
Hoberman, Barry A Cupertino, US 19 313
Walker, William G Saratoga, US 21 269
Zampaglione, Michael A San Jose, US 18 211

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