Method and apparatus for low jitter clock recovery in wireless display extensions

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United States of America Patent

PATENT NO 9723342
SERIAL NO

13996621

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An approach is provided for determining a program clock reference (PCR) value validity, for avoiding inaccurate variable delay reference (VDR) values, and for avoiding a mismatch in a data packet between a sequence number and a packet number for a wireless display extension. The approach involves determining to generate a data packet carrier having an optional PCR value, a VDR) value, and a validity indicator. The approach may further involve processing the data packet carrier to determine whether the data packet carrier has the optional PCR value. The approach may also involve causing, at least in part, a surrogate PCR value to be generated based, at least in part, on a determined absence of the optional PCR value from the data packet carrier.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bennett, Joseph A Roseville, US 42 813
Brouillette, Pat Tempe, US 8 19
Hayek, George R El Dorado Hills, US 18 453
Lee, Sang-Hee Santa Clara, US 248 1941
Li, Guoqing Portland, US 279 2634
Loukianov, Dmitrii A Chandler, US 4 25
Prat, Gideon Haifa, IL 13 193
Somayazulu, Vallabhajosyula Z Portland, US 3 37
Trainin, Solomon B Haifa, IL 119 1215

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