Method and apparatus for stream buffer management instructions

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United States of America Patent

PATENT NO 9727471
SERIAL NO

12955763

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Abstract

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A method and system to perform stream buffer management instructions in a processor. The stream buffer management instructions facilitate the creation and usage of a dedicated memory space or stream buffer of the processor in one embodiment of the invention. The dedicated memory space is a contiguous memory space and has a sequential or linear addressing scheme in one embodiment of the invention. The processor has logic to execute a stream buffer management instruction to copy data from a source memory address to a destination memory address that is specified with a desired level of memory hierarchy.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chhugani, Jatin Santa Clara, US 53 866
Kim, Changkyu San Jose, US 39 748
Kim, Daehyun San Jose, US 151 1351
Lee, Victor W Santa Clara, US 60 1028
Satish, Nadathur Rajagopalan Santa Clara, US 65 543

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