Address learning and aging for network bridging in a network processor

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United States of America Patent

PATENT NO 9727508
SERIAL NO

13705822

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Abstract

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Described embodiments process data packets received that include a source address and at least one destination address. If the destination address is stored in a memory of an I/O adapter, the received data packet is processed in accordance with bridging rules associated with each destination address stored in the I/O adapter memory. If the destination address is not stored in the I/O adapter memory, the I/O adapter sends a task message to a processor to determine whether the destination address is stored in an address table stored in a shared memory of the network processor. The I/O adapter memory has lower access latency than the address table. If the destination address is stored in the address table, the received data packet is processed in accordance with bridging rules stored in the address table and the bridging rules stored in the I/O adapter memory are updated.

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Patent Owner(s)

  • INTEL CORPORATION

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Guo, Zhong Bethlehem, US 6 108
Manzella, Joseph A Macungie, US 14 228
Munoz, Robert J Round Rock, US 22 398
Roper, Walter A Lebanon, US 4 189

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