Method for finding non-essential flip flops in a VLSI design that do not require retention in standby mode

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United States of America Patent

PATENT NO 9727686
SERIAL NO

14758927

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Abstract

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The invention relates to a method for reducing the number of flip-flops in a VLSI design that require data retention, thereby eliminating the respective backup cells for those flip flops, the method comprises the steps of: (a) defining one or more criteria for non-essentiality of backup cells! (b) during the physical design stage, analyzing the VLSI design based on said one or more criteria for non-essentiality, and finding those flip-flops that meet these criteria, wherein said analysis is performed at the gate level, independent from any higher level representation of the design; and (c) eliminating from the VLSI design those backup cells for all non-essential flip-flops that meet one or more of said criteria for non-essentiality, thereby leaving in the design only those backup cells for those flip-flops that do not meet any of said criteria.

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Patent Owner(s)

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B G NEGEV TECHNOLOGIES AND APPLICATIONS LTDAT BEN-GURION UNIVERSITY P O BOX 653 BEER SHEVA 8410501

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Greenberg, Shlomo Omer, IL 2 89
Manor, Erez Haifa, IL 12 36
Paperno, Evgeny Beer Sheva, IL 1 5
Rabinowicz, Yossi Even Yehuda, IL 1 5
Tsechanski, Ron Beer Sheva, IL 2 5
Weber, Ori Tel Aviv, IL 27 46

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