Hardware apparatuses and methods to perform transactional power management

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United States of America Patent

PATENT NO 9733689
SERIAL NO

14752896

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Abstract

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Methods and apparatuses relating to transactional power management are described. In one embodiment, a hardware apparatus includes a hardware processor having a core, a plurality of power domains to transition to one of a plurality of power states in response to a power management command for each power domain, and a power transaction unit to assign a first power management command as a first power transaction and a second power management command as a second power transaction for concurrent execution, perform a commit of the first power transaction and the second power transaction when there is no conflict between the first power transaction and the second power transaction, and perform an abort of the first power transaction and a commit of the second power transaction when there is a conflict between the first power transaction and the second power transaction.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Krishnakumar, Nivedha Bangalore, IN 4 6
Muralidhar, Rajeev D Bangalore, IN 23 122
Partiwala, Suketu R Chandler, US 6 50
Seshadri, Harinarayanan Bangalore, IN 26 164
Singh, Youvedeep Bangalore, IN 6 23

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