Cascaded multi-level power converter
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United States of America Patent
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Aug 15, 2017
Grant Date -
Oct 29, 2015
app pub date -
Jan 16, 2014
filing date -
Jan 29, 2013
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Abstract
A multi-level power converter comprising: n input stages (Ein_n), n being at least equal to 1, each input stage comprising n+1 identical input converters (CONVx_En) connected together, the input converters (CONVx_En) exhibiting an identical topology, chosen from among the architectures of the NPC (Neutral Point Clamped), ANPC (Active Neutral Point Clamped), NPP (Neutral Point Piloted) and SMC (Stacked Multicell Converter); an output stage (Eout) connected to the input stage of rank 1 and comprising an output converter (CONVs) supplied with a differential voltage (Vfloat) resulting from a first electrical potential applied to the output of a first input converter of the input stage of rank 1 and from a second electrical potential applied to the output of a second input converter of the input stage of rank 1, the output converter (CONVs) exhibiting a topology chosen from among an architecture with floating capacitor (FC), SMC (Stacked Multicell Converter), NPC (Neutral Point Clamped), NPP (Neutral Point Piloted) and ANPC (Active Neutral Point Clamped).
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