Flexible ripple mode device implementation for programmable logic devices

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United States of America Patent

PATENT NO 9735761
SERIAL NO

14610074

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Abstract

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Various techniques are provided to efficiently implement user designs in programmable logic devices (PLDs). In one example, a programmable logic device (PLD) includes a plurality of programmable logic blocks (PLBs) and a plurality of logic cells within at least one of the PLBs, where each logic cell includes a four input lookup table (4-LUT) configured to provide a 4-LUT output signal to associated carry logic. Each logic cell is configurable according to at least two selectable operational modes including a logic function output mode and a ripple arithmetic output mode, and at least three of the 4-LUT inputs are interchangeable when a selected operational mode comprises the ripple arithmetic output mode.

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Patent Owner(s)

Patent OwnerAddress
LATTICE SEMICONDUCTOR CORPORATION5555 NE MOORE CT HILLSBORO OR 97124

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gunaratna, Senani Los Gatos, US 13 51
Sharpe-Geisler, Brad San Jose, US 30 172
Yew, Ting San Jose, US 13 41

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