Wire bond through-via structure and method

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United States of America Patent

PATENT NO 9741680
SERIAL NO

15250701

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Abstract

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A stackable integrated circuit chip layer and module device that avoids the use of electrically conductive elements on the external surfaces of a layer containing an integrated circuit die by taking advantage of conventional wire bonding equipment to provide an electrically conductive path defined by a wire bond segment that is encapsulated in a potting material so as to define an electrically conductive wire bond “through-via” accessible from at least the lower or second surface of the layer.

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Patent Owner(s)

Patent OwnerAddress
PFG IP LLCTIBURON CA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bindrup, Randy Costa Mesa, US 9 56
Boyd, W Eric Costa Mesa, US 28 755
Leon, John Costa Mesa, US 32 552
Pepe, Angel - 5 24
Yamaguchi, James Costa Mesa, US 16 153

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