Apparatus and method for clock generation

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United States of America Patent

PATENT NO 9749125
SERIAL NO

14568818

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Abstract

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A clock and data recovery (CDR) system may use one or more clock signals in sync with recovered data rate. By accumulating a dithering tuning counter value at a data oversampling rate, a plurality of single bit signals at multiples of the recovered data rate and in sync with the recovered data rate can be accurately generated while utilizing the full range of the accumulator. This plurality of clock signals can be used in various modules in the CDR system and other modules in a transceiver system incorporating the CDR system.

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Patent Owner(s)

Patent OwnerAddress
ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANYBAY F1 RAHEEN INDUSTRIAL ESTATE CO LIMERICK LIMERICK

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Khan, Muhammad Kalimuddin Rochestown, IE 7 32
Mulvaney, Kenneth J Coolaney, IE 10 82

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