Integrated passive device having improved linearity and isolation
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United States of America Patent
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Sep 5, 2017
Grant Date -
Sep 11, 2014
app pub date -
Jan 28, 2014
filing date -
Mar 8, 2013
priority date (Note) -
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Abstract
Disclosed is a structure for improved electrical signal isolation in a semiconductor substrate between integrated passive devices (IPDs) and an associated method for the structure's fabrication. The structure includes an amorphized region in the semiconductor substrate, a dielectric layer formed over the amorphized region, and IPDs formed over the dielectric layer. The amorphized region is not recrystallized and may be formed by utilizing an inert implant that does not charge-dope the amorphized region, while forming a plurality of charge carrier traps at an interface between the amorphized region and the dielectric layer to prevent a parasitic conduction layer from forming at the interface. The inert implant may include one of Argon, Xenon and Germanium. In many implementations, the structure does not include an active device.
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