Semiconductor device and method of making embedded wafer level chip scale packages
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United States of America Patent
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Sep 19, 2017
Issued Date -
N/A
app pub date -
Dec 23, 2013
filing date -
Dec 23, 2013
priority date (Note) -
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Abstract
A semiconductor device includes a carrier and a plurality of semiconductor die disposed over the carrier. An encapsulant is deposited over the semiconductor die. A composite layer is formed over the encapsulant to form a panel. The carrier is removed. A conductive layer is formed over the panel. An insulating layer is formed over the conductive layer. The carrier includes a glass layer, a second composite layer formed over the glass layer, and an interface layer formed over the glass layer. The composite layer and encapsulant are selected to tune a coefficient of thermal expansion of the panel. The panel includes panel blocks comprising an opening separating the panel blocks. The encapsulant or insulating material is deposited in the opening. A plurality of support members are disposed around the panel blocks. An interconnect structure is formed over the conductive layer.
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