Biasing scheme for high voltage circuits using low voltage devices
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United States of America Patent
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Sep 26, 2017
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app pub date -
Dec 5, 2014
filing date -
Dec 5, 2014
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Abstract
Some embodiments include apparatus and methods having a first node to receive a supply voltage, a second node to receive a first bias voltage, a third node to receive ground potential, a first circuit branch coupled between the first and second nodes, and a second circuit branch coupled between the first and third nodes. The first bias voltage is provided to a gate of a first transistor among a plurality of transistors coupled in series. The first and second circuit branches are arranged to provide a second bias voltage to gate of a second transistor among the plurality of transistors. The value of the second bias voltage is based on a value of the first bias voltage.
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