Method, device, and system for processing PCIe link fault

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United States of America Patent

PATENT NO 9785530
APP PUB NO 20150324268A1
SERIAL NO

14806078

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Abstract

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In a Peripheral Component Interconnect Express (PCIe) system, a first PCIe apparatus determines that at least one of lanes of a link between the first PCIe apparatus and a second PCIe apparatus is disabled, wherein the link includes M lanes numbered in a first order. Based upon the determination, the first PCIe apparatus obtains a number N indicating a number of available lanes of the link by performing a lane negotiation with the second PCIe apparatus. Then, a processor determines that N

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Patent Owner(s)

  • HUAWEI TECHNOLOGIES CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Du, Ge Chengdu, CN 8 232

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