Three dimensional resistive memory architectures

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United States of America Patent

PATENT NO 9792980
APP PUB NO 20160247565A1
SERIAL NO

15031813

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Abstract

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In one example, a three dimensional resistive memory architecture includes adjacent memory tiles with each tile including a multilevel resistive crossbar array and at least one decoder. The multilevel crossbar array includes layers of row crossbars, layers of column crossbars, and layers of resistive memory elements interposed between cross points of the row crossbars and the column crossbars, in which at least one layer of crossbars extends from a first tile through an adjacent tile and is used to address resistive memory elements in the adjacent tile. The at least one decoder underlies the multilevel resistive crossbar array and includes an address matrix comprising digital lines and analog lines, in which the digital lines select which crossbars are connected to the analog lines.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LPHOUSTON, TX8793

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Patent Info (Count) # Cites Year
 
ADVANCED MICRO DEVICES, INC. (1)
2013/0083,048 INTEGRATED CIRCUIT WITH ACTIVE MEMORY AND PASSIVE VARIABLE RESISTIVE MEMORY WITH SHARED MEMORY CONTROL LOGIC AND METHOD OF MAKING SAME 5 2012
 
SANDISK TECHNOLOGIES LLC (2)
2008/0025,131 DUAL DATA-DEPENDENT BUSSES FOR COUPLING READ/WRITE CIRCUITS TO A MEMORY ARRAY 15 2006
2011/0310,653 Memory Cell With Resistance-Switching Layers 22 2011
 
UNITY SEMICONDUCTOR CORPORATION (1)
2013/0210,211 Vertical Cross-Point Memory Arrays 14 2012
 
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (1)
2012/0098,566 Interconnection Architectures for Multilayer Crossbar Circuits 5 2010
 
MICRON TECHNOLOGY, INC. (2)
2008/0313,525 Error detection for multi-bit memory 3 2007
2011/0199,814 Cross-Point Memory Cells, Non-Volatile Memory Arrays, Methods of Reading a Memory Cell, Methods of Programming a Memory Cell, Methods of Writing to and Reading from a Memory Cell, and Computer Systems 17 2010
 
CARLOW INNOVATIONS, LLC (1)
2009/0256,133 Multiple layer resistive memory 3 2008
 
SK HYNIX INC. (1)
2010/0315,866 PHASE CHANGE MEMORY DEVICE HAVING MULTI-LEVEL AND METHOD OF DRIVING THE SAME 8 2009
 
HITACHI, LTD. (1)
* 2011/0242,872 SEMICONDUCTOR DEVICE 9 2009
 
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. (1)
5761110 Memory cell capable of storing more than two logic states by using programmable resistances 26 1996
* Cited By Examiner

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