Three dimensional resistive memory architectures

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United States of America Patent

PATENT NO 9792980
APP PUB NO 20160247565A1
SERIAL NO

15031813

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Abstract

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In one example, a three dimensional resistive memory architecture includes adjacent memory tiles with each tile including a multilevel resistive crossbar array and at least one decoder. The multilevel crossbar array includes layers of row crossbars, layers of column crossbars, and layers of resistive memory elements interposed between cross points of the row crossbars and the column crossbars, in which at least one layer of crossbars extends from a first tile through an adjacent tile and is used to address resistive memory elements in the adjacent tile. The at least one decoder underlies the multilevel resistive crossbar array and includes an address matrix comprising digital lines and analog lines, in which the digital lines select which crossbars are connected to the analog lines.

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Patent Owner(s)

Patent OwnerAddress
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP11445 COMPAQ CENTER DRIVE WEST HOUSTON TX 77070

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chung, Sung Won Icheon, KR 4 6
Hwang, Sangmin Icheon, KR 4 3
Kim, Jeong Hwan Icheon, KR 62 158
Lee, Jae Yeon Icheon, KR 42 262
Park, Jinwon Icheon, KR 2 2
Perner, Frederick Palo Alto, US 37 314
Rho, Kwangmyoung Icheon, KR 1 1
Yi, Jae Yun Icheon, KR 7 10

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