Semiconductor substrate-on-semiconductor substrate package and method of manufacturing the same
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United States of America Patent
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Oct 24, 2017
Grant Date -
Jun 8, 2017
app pub date -
Dec 2, 2016
filing date -
Dec 3, 2015
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Abstract
A semiconductor assembly includes a first semiconductor substrate having a first main surface and a second main surface and a second semiconductor substrate having a first main surface and a second main surface. The first main surface of the first semiconductor substrate faces the second main surface of the second semiconductor substrate. Further, the semiconductor assembly includes a plurality of first electrodes disposed on the first main surface of the first semiconductor chip and a plurality of second electrodes disposed on the second main surface of the second semiconductor chip, wherein the first electrodes are aligned with and connected by interconnects to the second electrodes. An electrically conducting layer perforated by holes is disposed between and fixed to the first semiconductor substrate and the second semiconductor substrate, wherein the interconnects penetrate the holes. The electrically conducting layer is electrically connected to a function test electrode of the semiconductor assembly.
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