Bump structure design for stress reduction

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United States of America Patent

PATENT NO 9799582
SERIAL NO

15488972

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Abstract

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Low stress bumps can be used to reduce stress and strain on bumps bonded to a substrate with different coefficients of thermal expansion (CTEs) from the die. The low stress bumps include multiple polymer layers. More than one type of bump is coupled to a die, with low stress bumps placed on areas subjected to high stress.

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Patent Owner(s)

  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., ("TSMC")

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Hsien-Wei Hsinchu, TW 910 8178

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