Memory mirroring utilizing single write operations
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United States of America Patent
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Oct 31, 2017
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app pub date -
Dec 12, 2014
filing date -
Apr 25, 2014
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Abstract
Memory system enabling memory mirroring in single write operations for the primary and backup data storage. The memory system utilizes a memory channel including one or more latency groups, with each latency group encompassing a number of memory modules that have the same signal timing to the controller. A primary copy and a backup copy of a data element can be written to two memory modules in the same latency group of the channel and in a single write operation. The buses of the channel may have the same trace length to each of the memory modules within a latency group.
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