Ring bus architecture for use in a memory module
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United States of America Patent
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Oct 31, 2017
Grant Date -
Jun 30, 2016
app pub date -
Dec 29, 2014
filing date -
Dec 29, 2014
priority date (Note) -
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Abstract
Ring bus architectures for use in a memory module are disclosed. A memory module may include a ring bus controller and a bus bridge positioned on a primary ring bus. The memory module also includes a secondary ring bus in communication with the bus bridge and a plurality of non-volatile memory units. The ring bus controller is configured to send a configuration command to the bus bridge via the primary bus ring, where the configuration command includes an indication to route future commands and/or data to the secondary ring bus extending from the bus bridge. The bus bridge is configuration to, in response to the configuration command, configure the bus bridge to route future commands and/or data from the primary ring bus to the secondary ring bus.
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