Semiconductor devices having a gate stack

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United States of America Patent

PATENT NO 9806169
APP PUB NO 20150054073A1
SERIAL NO

14389055

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Abstract

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Semiconductor devices and methods for manufacturing the same are provided. In one embodiment, the method may include: forming a first shielding layer on a substrate, and forming one of source and drain regions with the first shielding layer as a mask; forming a second shielding layer on the substrate, and forming the other of the source and drain regions with the second shielding layer as a mask; removing a portion of the second shielding layer which is next to the other of the source and drain regions; forming a gate dielectric layer, and forming a gate conductor as a spacer on a sidewall of a remaining portion of the second shielding layer; and forming a stressed interlayer dielectric layer on the substrate.

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Patent Owner(s)

  • INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES;INSTITUTE OF MICROELECTRONICS, CHINESE ACADAMY OF SCIENCES

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Liang, Qingqing Lagrangeville, US 167 2535
Zhong, Huicai San Jose, US 108 1677
Zhu, Huilong Poughkeepsie, US 687 12401

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