Method for making source and drain regions of a MOSFET with embedded germanium-containing layers having different germanium concentration
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United States of America Patent
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Oct 31, 2017
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app pub date -
May 9, 2016
filing date -
Aug 16, 2013
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Abstract
An integrated circuit structure includes a gate stack over a semiconductor substrate, and an opening extending into the semiconductor substrate, wherein the opening is adjacent to the gate stack. A first silicon germanium region is in the opening, wherein the first silicon germanium region has a first germanium percentage. A second silicon germanium region is over the first silicon germanium region, wherein the second silicon germanium region has a second germanium percentage higher than the first germanium percentage. A third silicon germanium region is over the second silicon germanium region, wherein the third silicon germanium region has a third germanium percentage lower than the second germanium percentage.
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