Method for fabricating conducting structure and thin film transistor array panel

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United States of America Patent

PATENT NO 9806179
SERIAL NO

15071170

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Abstract

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A method of providing a conducting structure over a substrate, which comprises: disposing a lower sub-layer over a substrate, the lower sub-layer comprising a conductive metal oxide material that includes indium and zinc, wherein the indium and zinc content in the bottom sub-layer substantially defines a first indium to zinc content ratio; performing a first hydrogen treatment over an exposed surface of the lower sub-layer for introducing hydrogen content therein; disposing a middle sub-layer over the lower sub-layer, the middle sub-layer comprising a metal material; disposing an upper sub-layer over the middle sub-layer, the upper sub-layer comprising a conductive metal oxide material that includes indium and zinc, wherein the indium and the zinc content in the upper sub-layer substantially defines a second indium to zinc content ratio smaller than the first indium to zinc content ratio; and patterning the multi-layered conductive structure to generate a composite lateral etch profile.

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Patent Owner(s)

  • HON HAI PRECISION INDUSTRY CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Wei-Chih New Taipei, TW 104 499
Kao, Yi-Chun New Taipei, TW 42 90
Lin, Hsin-Hua New Taipei, TW 39 94
Shih, Po-Li New Taipei, TW 32 41
Wan, Chang-Chun Hsinchu, TW 3 2
Wu, I-Wei New Taipei, TW 75 767

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