Buffer memory devices, memory modules and solid state disks with non-uniform memory device connections
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United States of America Patent
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Nov 7, 2017
Issued Date -
Feb 16, 2017
app pub date -
Jul 8, 2016
filing date -
Aug 11, 2015
priority date (Note) -
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Abstract
A memory module includes at least two rows of memory device packages on a substrate and coupled to a control signal line. A first memory device package in a first row is connected to the control signal line at a first point closest to the proximal end of the control signal line and a second memory device in a second row is connected to the control signal line at a second point next closest to the first point. A signal trace length between the first memory device and the second memory device may be greater than a signal trace length between the first memory device package and a third memory device package immediately adjacent the first memory device package in the first row or a signal trace length between the second memory device package and a fourth memory device package immediately adjacent the second memory device package in the second row.
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