Interconnection cells having variable width metal lines and fully-self aligned continuity cuts
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United States of America Patent
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Nov 7, 2017
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app pub date -
Dec 15, 2016
filing date -
Dec 15, 2016
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Abstract
A method includes patterning a 1st mandrel cell into a 1st mandrel layer disposed above a dielectric layer of a semiconductor structure. The 1st mandrel cell has 1st mandrels, 1st mandrel spaces and a mandrel cell pitch. A 2nd mandrel cell is patterned into a 2nd mandrel layer disposed above the 1st mandrel layer. The 2nd mandrel cell has 2nd mandrels, 2nd mandrel spaces, and the mandrel cell pitch. The 1st and 2nd mandrel cells are utilized to form metal line cells into the dielectric layer. The metal line cells have metal lines, spaces between the metal lines and a line cell pitch. The line cell pitch is equal to the mandrel cell pitch when the metal lines of the metal line cells are an even number. The line cell pitch is equal to half the mandrel cell pitch when the metal lines of the metal line cells are an odd number.
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