Chip package and a manufacturing method thereof

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United States of America Patent

PATENT NO 9812414
SERIAL NO

15186100

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ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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A chip package includes a first substrate; a first insulation layer disposed over the first substrate; a conductive structure disposed within the first insulation layer; a buffering member embedded into the first insulation layer; a redistribution layer (RDL) electrically connected with the conductive structure and disposed over the conductive structure and the buffering member; and a second insulation layer disposed over the RDL, wherein a portion of the RDL is exposed from the second insulation layer and disposed over the buffering member.

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First Claim

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Patent Owner(s)

  • NANYA TECHNOLOGY CORPORATION

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lin, Po Chun Changhua, TW 21 52

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