Data reading circuit
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United States of America Patent
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Nov 21, 2017
Issued Date -
N/A
app pub date -
Mar 21, 2017
filing date -
Mar 21, 2016
priority date (Note) -
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status (Latency Note)
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Abstract
A data reading circuit including a phase difference determining module, a time delay detection module, and a reading control module, and the phase difference determining module is connected to the echo clock signal and a clock signal of the second clock domain. The phase difference determining module is configured to determine a phase difference between the echo clock signal and the clock signal of the second clock domain; the time delay detection module is configured to detect a time delay value in transmission of data from a buffer to a flip-flop; and the reading control module is configured to determine, according to the phase difference and the time delay value, a triggering edge, at which the flip-flop can read data output by the buffer, of the clock signal of the second clock domain.
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