Nonvolatile memory system and sequential reading and programming methods thereof

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United States of America Patent

PATENT NO 9851899
SERIAL NO

15498153

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Abstract

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A nonvolatile memory device includes a multi-level cell which stores M-bit data at a time and M number of latches for respectively storing M-bit data on a single bit basis. A controller sequentially latches M-bit data of the multi-level cell into the M number of latches, respectively, during a first half read period, and sequentially outputs the latched M-bit data in the M number of latches during a second half read period.

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Patent Owner(s)

  • SK HYNIX INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
You, Byoung-Sung Gyeonggi-do, KR 7 23

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